USB 3.2 PCB Layout Guidelines
Route USB 3.2 SuperSpeed pairs at 90 Ω differential, match the two traces of a pair to about 5 mil, AC-couple every transmitter with 75–265 nF next to the connector, and keep the host or device within the informative 8.5 dB loss budget at the Nyquist frequency.
Every rule below names the document it comes from: the USB 3.2 specification where it makes the rule mandatory, otherwise a chip vendor’s layout guide. Vendor guides differ, so treat their numbers as good practice and follow your own device’s guide where it is stricter.
Key numbers
| Quantity | USB 3.2 Gen 1 (5 Gb/s) | USB 3.2 Gen 2 (10 Gb/s) |
|---|---|---|
| Line rate | 5 Gb/s | 10 Gb/s |
| Nyquist frequency | 2.5 GHz | 5 GHz |
| Encoding | 8b/10b, with mandatory spread-spectrum clocking (30–33 kHz, 0 to −5000 ppm) | 128b/132b, with mandatory spread-spectrum clocking |
| Impedance | 90 Ω differential (81–99 Ω) | 90 Ω differential (81–99 Ω) |
| Intra-pair skew | 0.127 mm (5 mil) | 0.127 mm (5 mil) |
| Board loss budget | 8.5 dB at 2.5 GHz | 8.5 dB at 5 GHz |
| Longest route | 229 mm (9 in) | 229 mm (9 in) |
- USB 3.2 Gen 1 (5 Gb/s): Vendors route SuperSpeed to 90 Ω ±10 %; TI allows ±15 %.
- USB 3.2 Gen 1 (5 Gb/s): The USB 3.2 specification gives an informative budget of 8.5 dB for the host or device and 23 dB for the whole channel, and advises designing about 3 dB better than that.
- USB 3.2 Gen 2 (10 Gb/s): Same informative budget as Gen 1 (8.5 dB for the host or device, 23 dB end to end), but now measured at 5 GHz, where the board loses roughly 1.4 times as much per inch.
USB 3.2 Gen 1 (5 Gb/s) routing rules
SuperSpeed at 5 Gb/s: one transmit pair and one receive pair.
| Rule | Requirement | Basis |
|---|---|---|
| Impedance | 90 Ω differential on the board. The silicon itself is specified at 72–120 Ω. The 85 Ω figure quoted so often is not a trace target: it is the mated Type-C connector value (85 Ω ±9 Ω) and the impedance the Type-C S-parameters are normalised to. | Vendor guide [2] |
| Intra-pair matching | About 5 mil, or 15 ps per metre. The specification sets no board limit; the raw cable is held to 10 ps per metre. | Vendor guide [2] |
| Pair-to-pair matching | None. The transmit and receive pairs do not have to be the same length. | Vendor guide [2] |
| Insertion loss | Informative budget: 8.5 dB for the host or device, 23 dB end to end, at the 2.5 GHz Nyquist frequency. A 3 m cable alone can spend 7.5 dB of that, so leave margin. | Specification [1] |
| AC coupling | Every transmitter is AC-coupled, 75–265 nF, placed next to the connector. A receiver may be coupled too, but then the window is 297–363 nF. 100 nF in an 0402 (or smaller) package is the usual choice; 0603 is the largest allowed. | Specification [1] |
| Termination | On-die, 72–120 Ω differential at both ends. Receiver termination is also how the link detects a partner, so nothing external belongs on the pair. | Specification [1] |
| Vias and stubs | Keep via stubs under 15 mil or back-drill them, use a 30 mil anti-pad on every layer, and give both traces of a pair the same number of vias. | Vendor guide [2] |
| Reference plane | Same solid ground reference from end to end; where a pair changes layer, place ground stitching vias symmetrically within 200 mil of the signal vias. | Vendor guide [2] |
| Spacing | 5W between pairs, at least 30 mil to any other signal and 50 mil to a clock. | Vendor guide [2] |
| Connector launch | Void the reference plane under the connector pads and under any series component on the pair, at least two layers deep. Without the void, the launch impedance under a SuperSpeed receptacle can fall to about 40 Ω. | Vendor guide [4] |
| Polarity | The two lines of a pair may be swapped to avoid a crossover; the link sorts it out. | Vendor guide [2] |
Check USB 3.2 Gen 1 (5 Gb/s) on your own stackup → The interface rules tool designs the trace for this impedance on a layer you choose and turns every limit above into a length on that board.
USB 3.2 Gen 2 (10 Gb/s) routing rules
SuperSpeed at 10 Gb/s: the same pairs as Gen 1, at twice the rate.
| Rule | Requirement | Basis |
|---|---|---|
| Impedance | 90 Ω differential on the board; the silicon is specified at 72–120 Ω. | Vendor guide [2] |
| Intra-pair matching | About 5 mil, or 15 ps per metre. | Vendor guide [2] |
| Pair-to-pair matching | None: transmit and receive lengths are independent. | Vendor guide [2] |
| Insertion loss | Informative budget 8.5 dB for the host or device, 23 dB end to end, at the 5 GHz Nyquist frequency. | Specification [1] |
| AC coupling | Mandatory on every transmitter, 75–265 nF (297–363 nF if a receiver is coupled as well), in an 0402 package or smaller, next to the connector. | Specification [1] |
| Termination | On-die, 72–120 Ω differential; nothing external on the pair. | Specification [1] |
| Vias and stubs | Under 15 mil of stub or back-drill; two via pairs at most; equal via count on both traces. At 5 GHz the stub, not the barrel, is what costs you the eye. | Vendor guide [2] |
| Reference plane | One solid ground reference end to end, with stitching vias within 200 mil of every layer change. | Vendor guide [2] |
| Spacing | 5W between pairs, 30 mil to other signals, 50 mil to clocks. | Vendor guide [2] |
| Connector launch | Void the plane under the receptacle and under the coupling capacitors, at least two layers deep. | Vendor guide [4] |
Check USB 3.2 Gen 2 (10 Gb/s) on your own stackup → The interface rules tool designs the trace for this impedance on a layer you choose and turns every limit above into a length on that board.
Related guides
- Is USB 3 85 Ω or 90 Ω? What the Specifications Actually Say
- AC Coupling Capacitors on High-Speed Links: the Value for Every Interface
- Controlled Impedance Explained: Microstrip, Stripline and Solder Mask
Sources
- USB 3.2 Specification Rev 1.1 (June 2022). Table 6-18 transmitter parameters (72–120 Ω, AC coupling 75–265 nF, de-emphasis), Table 6-22 receiver parameters (297–363 nF if coupled), §6.5.3 spread spectrum, §E.6.4.8 the 8.5 dB / 23 dB insertion-loss budget.
- TI SLLA414 — High-Speed Layout Guidelines for Signal Conditioners and USB Hubs. Per-interface impedance and skew table (USB 3.2: 90 Ω ±15 %, 15 ps/m, no inter-pair requirement), 5W spacing, 15 mil via stubs and back-drilling, 30 mil anti-pads, 200 mil stitching vias, capacitor package sizes and pad voiding.
- USB Type-C Cable and Connector Specification Release 2.0 (August 2019). §3.7 S-parameters normalised to 85 Ω, §3.7.3.1 mated connector 85 Ω ±9 Ω, §3.7.1 raw cable 90 Ω ±5 Ω and 10 ps/m intra-pair skew, §E.2.2 AC coupling for alternate modes.
- USB-IF — Managing Connector and Cable Assembly Performance for USB SuperSpeed (Rev 1.0, 2013). Mated connector 75–105 Ω, cable insertion-loss mask, and the ground voiding under receptacle pads without which the launch drops to about 40 Ω.
Layout guidelines for other interfaces
HDMI · DisplayPort · USB 2.0 · DDR4 · LPDDR4 · RGMII · RMII · SGMII · 1000BASE-T Ethernet · MIPI D-PHY · SATA · PCIe