EMI Filter Designer

Design and analyse differential-mode LC, π and ferrite-bead filters for DC rails, including source/load impedance, component parasitics, resonance and RC damping.

Method, formulas and references

Scope and noise direction

A lumped differential-mode filter for a DC rail and its return conductor. LC has one series part followed by shunt C2; π adds shunt C1 before the series part. The source is a Thevenin voltage Vs with a positive, purely resistive Rs. RL = 0 removes the load. All capacitors share the same ideal return.

Forward voltage gain is H = Vout/Vs. For reverse conducted noise, a current source Inoise is placed across the output, Vs is shorted and RL remains connected. Reciprocity gives Isource/Inoise = H for this circuit. This is a current ratio into the source branch, not a reverse voltage ratio or a radiated-emissions prediction.

Component models

ZC = ESR + jωESL + 1/(jωC), ω = 2πf

Capacitance is the effective value at the operating voltage. The inductor model is (Rdc + jωL) in parallel with Cp. It includes winding resistance and self-capacitance, but not frequency-dependent core loss. The ferrite model uses Rdc in series with the parallel combination of jωL, Rac and 1/(jωCp), following AN-1368. Cp = 0 removes that branch.

The AN-1368 bead example uses L = 1.208 µH, Rdc = 0.3 Ω, Rac = 1.082 kΩ and Cp = 1.678 pF, extracted at zero DC bias. Its illustrative capacitor and terminations are not measured data. Model parameters should be fitted to the manufacturer’s complex impedance curve at the actual operating current. A single impedance specification at 100 MHz does not determine L, Rac and Cp; no universal current-based derating law is applied.

Loaded network calculation

Let Z be the series-part impedance, Y1 = 1/ZC1 for π (0 for LC), Y2 = 1/ZC2 + Yd and YL = 1/RL (0 for a disconnected load). With damping enabled, Yd = 1/[Rd + 1/(jωCd)]. Rd includes the damping capacitor’s ESR; its ESL is neglected.

H = 1 / [(1 + RsY1)(1 + Z(Y2 + YL)) + Rs(Y2 + YL)]

This follows from the two node current equations. It includes the interaction of C1 and C2; individual stage responses are not multiplied. With the filter removed, Hbare = RL/(Rs + RL), or 1 without a load.

Insertion attenuation = 20 log₁₀(|Hbare|/|H|); phase = arg(H)

Positive attenuation means suppression relative to the unfiltered circuit; negative means amplification. This is voltage/current insertion attenuation for the entered impedances, not a matched 50 Ω S21 measurement. The probe target is a comparison at one frequency, not a compliance limit.

Reference sizing and damping

f₀ = 1/(2π√LC2); L = 1/[(2πf₀)²C2]; C2 = 1/[(2πf₀)²L]

These equations size a starting point. Loading, π capacitance, losses, parasitics and damping shift the response, so f₀ is not labelled an exact −3 dB cutoff. Preferred-value pairs bracket L and C2 and are ranked by LC reference error. Their entered parasitics remain fixed; inspect the selected parts’ data afterwards.

A resistor Rd in series with blocking capacitor Cd, across C2, provides an AC damping path without steady DC resistor loss. The plot compares this network with the same circuit without that branch. A larger Cd lets the branch act resistively closer to resonance; damping trades peak suppression against the wider frequency response.

Output impedance and DC loss

Zout = 1 / [Y2 + 1/(Z + Rs/(1 + RsY1))]

Zout is evaluated with Vs shorted and RL disconnected. For a switching-converter input, compare this filter output impedance with the converter input impedance across the relevant band, as described by TI SNVA538. A positive resistive RL cannot represent negative incremental converter input impedance or establish closed-loop stability.

DC drop = I·Rdc; DC loss = I²·Rdc

These use the separately entered DC current, exclude Rs, and omit core loss, ripple loss and temperature dependence. They do not establish component current, saturation, thermal or voltage ratings.

Sweep and limits

The sweep uses 401 logarithmic samples plus LC reference points, then refines bracketed gain and output-impedance maxima. Peaking is relative to the analytic DC response and is reported only inside the displayed band. Extremely narrow additional resonances may require a narrower sweep or circuit simulation. ESR/ESL models need non-zero loss when their parasitic resonance is enabled.

The model excludes common-mode currents, chassis coupling, cables, distributed PCB structures, regulator control loops and a complete LISN/test receiver. It does not predict an EMC test pass. Real layout inductance, component impedance data and measurement remain necessary for final selection.

References

Texas Instruments, SNVA538: Input Filter Design for Switching Power Supplies.
Analog Devices, AN-1368: Ferrite Bead Demystified.
IEC 60063, Preferred number series for resistors and capacitors.

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