RC Low-Pass & High-Pass Filter Calculator

Design and analyse passive RC low-pass and high-pass filters with source and load resistance, standard component values, tolerance bounds and interactive gain and phase plots.

Method, formulas and references

Topology and reference voltage

Vin is the ideal Thevenin source before its resistance Rs. The load RL is connected from Vout to ground; entering 0 removes it. All gains are Vout/Vin. A disconnected load is represented by RL → ∞ in the equations below.

Loaded low-pass

The source resistance Rs and filter resistor R are in series. The capacitor C and load RL are in parallel at the output. Let A = Rs + R.

(1)K = RL / (A + RL), τ = (A ∥ RL) C, H(s) = K / (1 + sτ)

Loaded high-pass

The source resistance Rs and capacitor C are in series. The filter resistor R and load RL both connect the output to ground. Let B = R ∥ RL.

(2)K = B / (Rs + B), τ = (Rs + B) C, H(s) = K sτ / (1 + sτ)

Parallel resistance X ∥ Y = 1 / (1/X + 1/Y). Without a load, the low-pass uses τ = (Rs + R) C and K = 1; the high-pass uses τ = (Rs + R) C and K = R / (Rs + R).

Cutoff, gain and phase

(3)fc = 1 / (2πτ), x = f/fc; low-pass |H| = K/√(1 + x²), high-pass |H| = Kx/√(1 + x²)

Phase is −atan(x) for low-pass and atan(1/x) for high-pass. Gain in dB is 20 log₁₀|H|. At fc, gain is K/√2, or 3.0103 dB below the passband; it need not be −3 dB relative to Vin. Stopband slope approaches 20 dB per decade in magnitude.

Designing R or C

For a target fc, let Q = 1/(2πfc C). Low-pass requires R = Q RL/(RL − Q) − Rs. High-pass requires R = (Q − Rs) RL/[RL − (Q − Rs)]. With no load these both reduce to R = Q − Rs. The target must give a finite, positive R; impossible loading conditions are reported rather than rounded to zero. To solve for C, divide 1/(2πfc) by the resistance seen by the capacitor.

Tolerance and time response

Four combinations of R(1 ± tR) and C(1 ± tC) give the displayed bounds and plot envelope. Rs and RL stay fixed. These are worst-case component limits, not a statistical confidence interval. Standard-value candidates bracket both calculated parts and are ranked by |ln(fc,actual/fc,target)|; component tolerances are entered separately.

For a unit voltage step and an initially uncharged capacitor, low-pass output is K(1 − e^(−t/τ)); high-pass output is K e^(−t/τ). Low-pass 10–90 % rise time is ln(9)τ. Settling within 1 % of the final low-pass value, or high-pass decay to 1 % of its initial amplitude, takes ln(100)τ.

Limits

This is a single passive stage with an ideal capacitor and purely resistive source/load. Capacitor ESR, ESL, leakage, voltage dependence, amplifier bandwidth and PCB parasitics are excluded. Cascaded unbuffered stages load each other and require a full network calculation; multiplying the isolated stage responses does not include that interaction. ADC sampling inputs are not generally a fixed resistive load.

References

  1. Texas Instruments Precision Labs, Passive components and circuits: RC filters and time constants.
  2. Analog Devices, A Beginner's Guide to Filter Topologies: passive first-order filters and their limits.
  3. Analog Devices, Cascaded RC low-pass filters: loading between passive stages.
  4. IEC 60063, Preferred number series for resistors and capacitors.

Related electronics tools